As semiconductor devices continue to be scaled to smaller and smaller dimensions, the thickness of the various layers used to fabricate the devices is also reduced. The precise etching of very thin device layers is challenging given the current etching technology. The endpoint detection systems used in etching apparatus must terminate the etching process at exactly the precise point that the device layer is removed. Over-etching of the device layer can result in damage to underlying surfaces, which can degrade device performance.
Shown in FIG. 1, in cross-section, is a MOS transistor 10 including a gate electrode 11 overlying a semiconductor substrate 12. A gate dielectric layer 14 separates gate electrode 11 from substrate 12. Sidewall spacers 16 reside adjacent to edges 18 of gate electrode 11. The structure illustrated in FIG. 1, is conventionally formed by growing an oxide layer on a principal surface 20 of substrate 12 to form gate dielectric layer 14. A layer of polycrystalline silicon is deposited on gate dielectric layer 14. The polycrystalline silicon is lithographically patterned and anisotropically etched to form gate electrode 11 having substantially vertical edges 18. The dielectric layer is also etched, such that portions of the dielectric layer exposed by gate electrode 11 are removed. Then, the lithographic pattern is removed and a layer of insulating material, such as silicon oxide or silicon nitride, is conformally deposited on gate electrode 11. To form sidewall spacers 16, the insulating material is anisotropically etched in a plasma etching apparatus (not shown) to remove portions of the insulating material overlying horizontal surfaces, such as upper surface 22 of gate electrode 11, but leaving insulating material on vertical surfaces, such as edges 18.
To avoid creating problems during subsequent fabrication steps used to manufacture devices, such as integrated circuits, and the like, it is important that all of the insulating material be removed from principal surface 20 during the sidewall spacer etching process. To insure that the insulating material is removed, an over-etching process is used in which the etching process is carried out for an extended amount of time beyond that necessary to just remove the insulating material. During the over-etching process, a portion of substrate 12 is also etched. This results in the formation of a recess 24 in the surface of substrate 12. The recess is shown in FIG. 1 as the region between the extended portions of principal surface 20 (indicated by dashed lines) and an etched surface 26 of substrate 12.
In advanced fabrication technology, the dimensions of device features such as gate electrode 11 are exceedingly small and the layers used to form the devices are very thin. For example, a typical deposited thickness of the insulating material used to form sidewall spacers 16 is on the order of 10 nm. With such a thin layer of insulating material to be etched, it is very difficult to precisely control the anisotropic etching process in a way that avoids substrate surface recessing, such as that shown in FIG. 1. When a recess is formed, such as recess 24, unwanted substrate surface features 28 are created near channel region 29, which underlies gate electrode 11 in substrate 12. The proximity of surface features 28 to channel region 29 can create disturbance in the electric fields created in channel region 29 during operation of MOS transistor 10.
Typically, the etching process used to form sidewall spacers 16 is controlled by an optical endpoint detection system employing either optical emission spectroscopy (OES) or optical reflection. The endpoint detection system is electrically coupled to control systems in the etching apparatus. In an OES system, the endpoint detection system monitors emission spectrum of the plasma during the etching process and signals the etch control system to stop when a set-point detection limit is reached. The sensitivity level needed to detect the removal of insulating material and the exposure of the underlying substrate surface is within the noise level of the system. Numerous commercial plasma etching apparatus having optical endpoint detection systems using OES technology are readily available and well known in the art.
In an optical reflection system, an optical signal is reflected from the surface of the insulating material. With very thin layers, such as the insulating material used to form sidewall spacers 16, the wavelength of the optical signal is large relative to the thickness of the insulating material, such that the signal strength is insufficient to precisely detect removal of the insulating material.
While such commercial OES and optical reflection systems are generally capable of precise etch control, as devices continue to be scaled to smaller dimensions and layer thickness decrease, even more etching endpoint control precision is needed.